1. Field of the Invention
The invention relates to the field of nonvolatile memory cells, particularly those employing MOS technology.
2. Prior Art
Most semiconductor memories and in particular, random-access memories (RAMs) require power to retain the information stored in them. When power is lost, data can be permanently lost since in some systems, certain data is stored only in these volatile memories. Because of this, numerous memories have been proposed (and some commercialized) which provide nonvolatile storage.
In some of these semiconductor memories two memory arrays are utilized, one is an ordinary RAM array and the other an electrically erasable and electrically programmable (E.sup.2) memory array. When power fails, the information from the RAM array is transferred into the programmable cells of the E.sup.2 array.
In another class of semiconductor nonvolatile memories, nonvolatile storage means are incorporated into each of the RAM memory cells. See the prior art discussion in U.S. Pat. No. 4,207,615.
The present invention is a unique coupling of a RAM cell and E.sup.2 memory cell. The closest prior art known to Applicant is that shown in U.S. Pat. Nos. 4,207,615 and 4,132,904. Unlike the present invention the cells of these references employ E.sup.2 devices across loads or switching transistors of static RAM cells.